📝 SummarXiv

Abstract

Virtual $Z$ gates have become integral for implementing fast, high-fidelity single-qubit operations. However, virtual $Z$ gates require that the system's two-qubit gates are microwave-activated or normalise the single-qubit $Z$ rotations$\unicode{x2014}$the group generated by $X$, $\operatorname{SWAP}$, and arbitrary phase gates. Herein, we extend the theory of virtual $Z$ gates to the pulse-level, which underlies both gate design and the recent advancements of pulse-level quantum algorithms. These algorithms attempt to utilise the full potential of present-day noisy intermediate-scale quantum (NISQ) devices by removing overheads associated with the compilation and transpilation of gates. To extend the theory of virtual $Z$ gates, we derive a platform-agnostic theoretical framework for virtual $Z$ pulses by employing time dilations of the pulse sequences that control the quantum processor. Additionally, we provide worked examples of the implementation of virtual $Z$ pulses on both semiconductor spin qubit and superconducting quantum processor architectures. Moreover, we present a general overview of the hardware support for virtual $Z$ pulses. We find virtual $Z$ pulses (and thus, virtual $Z$ gates) can be used on hardware that, with previous methods, did not support the virtual $Z$ gate. Finally, we present two additional applications of virtual $Z$ pulses to pulse-level algorithms. First, broadening the class of Hamiltonians that can be natively simulated in an analogue manner. Second, increasing the expressibility of pulse-based variational quantum algorithms.